On 18th June 2026, Yuki Mitarai (D1) , Department of Electrical Engineering and Information Systems, received IEEE Symposium on VLSI Technology & Circuit best student paper Nominee.
Ceremony
Certificate
IEEE Symposium on VLSI Technology & Circuit best student paper Nominee
Since 2004, the VLSI Symposium has presented a Best Student Paper Award to encourage the research of student projects which will lead the next generation. He has been chosen as a finalist for this award.
About awarded research
Title: 3D Orthogonal Die Stacking Technology for DRAM-on-GPU Integration Using Contactless Die-to-Die Interface
Brief summary: Massive orthogonal stacking assembly of IC (MOSAIC) technology was demonstrated to overcome thermal limitations in 3D memory-on-GPU configurations. By stacking memory dies orthogonally to the GPU, heat is dissipated effectively, enabling twice the memory capacity. A contactless die-to-die interface, achieving up to 4 Gbps/ch in a prototype, mitigates assembly challenges, enabling TSV-free 3D integration.
Your impression & future plan
I am truly honored that this work was selected as a Best Student Paper Nominee at the IEEE Symposium on VLSI Circuits and Technology. I would like to express my sincere gratitude to my academic advisors for their guidance and to my collaborators, whose daily discussions have been invaluable to this work. This work provides a proof of principle for MOSAIC, and I am committed to advancing my research toward its full system-level realization.
Ryoga Yamanaka (M1), Department of Electrical Engineering and Information Systems, received The 31st Best Student Presentation Award, The Acoustical Society of Japan
Makoto Nomura (M2), Department of Systems Innovation, received Young Researcher Encouragement Award at The Institute of Electronics, Information and Communication Engineers
