New Tunneling Field Effect Transistors operating at extremely-low power consumption -Utilizing a Structure Combining strained-Silicon with Germanium-
In the Japan Science and Technology Agency (JST) CREST Research Project (“Innovative nano-electronics through interdisciplinary collaboration among material, device and system layers” (Development of Tunneling MOSFET Technologies for Integrated Circuits with Ultra-Low Power Consumption)), Professor Shinichi Takagi and Associate Professor Mitsuru Takenaka in the University of Tokyo Graduate School of Engineering Department of Electrical Engineering and Information Systems have succeeded in development of a new transistor by using tunnel current able to operate using an extremely low supply voltage. In this study, the novel tunnel transistor with junctions composed of Ge sources and strained-Si channels has been realized using almost the same device structure as in conventional MOS (metal-oxide-semiconductor) transistors. It has been demonstrated that this MOSFET exhibits world-record high ratio of on-current to off-current with steep current change on application of gate voltage. This device is expected to provide a possibility to realize integrated circuits operating at supply voltage of 0.3 V and lower, leading to significant reduction in power consumption of IT devices.